Semiconductor device

ABSTRACT

A semiconductor device includes a substrate, a buffer layer, and a compound semiconductor layer. The buffer layer is configured by laminating two or more pairs of a first buffer and a second buffer. The first buffer is formed by laminating one or more pairs of an AlN layer and a GaN layer. The second buffer is formed of a GaN layer. A total Al composition of a pair of the first buffer and the second buffer on the compound semiconductor layer side is higher than that of a pair of the first buffer and the second buffer on the substrate side.

CROSS REFERENCE TO RELATED APPLICATION

This application claims priority to Japanese Patent Application No.2011-091213, filed Apr. 15, 2011.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a semiconductor device, specifically to theone in which a compound semiconductor layer is arranged on a substratewith a buffer layer interposed therebetween.

2. Description of the Related Art

Semiconductor light emitting devices and switching devices using GalliumNitride (GaN) based compound semiconductor are generally known.Well-known semiconductor light emitting devices are a light emittingdiode (LED), a semiconductor laser, and the like. Moreover, well-knownswitching devices are a high electron mobility transistor (HEMT),Schottky barrier diode (SBD), and the like.

Patent document 1 (U.S. Pat. No. 7,652,282 B2) discloses a semiconductordevice including a main semiconductor region for HEMT formed of nitridecompound semiconductor provided on a silicon substrate with a bufferformed of a nitride compound semiconductor interposed therebetween. Thebuffer layer includes a first multilayered buffer subregion formed onthe silicon substrate and a second multilayered buffer subregion formedon the first multilayered buffer subregion. The first multilayeredbuffer subregion is formed by alternately laminating a multilayeredbuffer region (superlattice buffer region or sub multi-sublayered bufferregion) of alternately laminating Al(Ga)N layers and (Al)GaN layers, anda non-sublayered buffer region of (Al)GaN layer. Similarly, the secondmultilayered buffer subregion is formed by alternately laminating amultilayered buffer region (superlattice buffer region or submulti-sublayered buffer region) of alternately laminating Al(Ga)N layersand (Al)GaN layers, and a non-sublayered buffer region of (Al)GaN layer.

Thus configured semiconductor device in the patent document 1 canpromote cancelling out stress generated in the first multilayered buffersubregion and stress generated in the second multilayered buffersubregion, thereby suppressing a warp of the silicon wafer. Furthermore,by suppressing the warp of the silicon wafer, the buffer layer and themain semiconductor region can be provided with greater thickness,thereby improving withstand voltage of the device in thicknessdirection.

SUMMARY OF THE INVENTION

However, in the semiconductor device of the patent document 1, it hasbeen difficult to improve the withstand voltage of the device in thethickness direction of the silicon substrate by increasing a number ofsets (pairs) of the superlattice buffer regions and non-sublayeredbuffer regions to increase thickness of the buffer layer and the mainsubstrate region.

The present invention has been made to solve the above problem. Theobject of the present invention is to provide a semiconductor device inwhich the buffer layer and compound semiconductor (device region or mainsemiconductor region) can be provided with greater thickness whilesuppressing the warp of the substrate, thereby improving the withstandvoltage of the device.

In order to solve the above problem, a semiconductor device according tothe first aspect of the present invention includes a substrate; a bufferlayer arranged on the substrate; and a compound semiconductor layerarranged on the buffer layer and functions as a device region. Thebuffer layer is configured by laminating two or more pairs of a firstbuffer and a second buffer. The first buffer is formed by laminating oneor more pairs of a first nitride compound semiconductor layer and asecond nitride compound semiconductor layer, the first nitride compoundsemiconductor layer having an aluminum composition therein, the secondnitride compound semiconductor layer having a larger lattice constantthan that of the first nitride compound semiconductor layer. The secondbuffer includes a third nitride compound semiconductor layer having alarger lattice constant than that of the first buffer. A total Alcomposition of a pair of the first buffer and the second buffer on thecompound semiconductor layer side is higher than that of a pair of thefirst buffer and the second buffer on the substrate side.

A thickness of the second buffer on the compound semiconductor layerside may be set to be thinner than that of the second buffer on thesubstrate side.

In the above case, a thickness of each second buffer may be set tobecome gradually thinner from the substrate side towards the compoundsemiconductor layer side.

In each of the pairs of the first buffer and the second buffer, thesecond buffer may be set to be thicker than the first buffer.

Each first buffer may be set to 50 to 150 nm thickness, and each secondbuffer may be set to 100 to 400 nm thickness.

A total Al composition of each pair of the first buffer and the secondbuffer may be set to become gradually higher from the substrate sidetowards the compound semiconductor layer side.

For the substrate, any one of a silicon substrate, a silicon compoundsubstrate, and a nitride compound semiconductor substrate may be used.

In accordance with the semiconductor device according to the firstaspect of the present invention, the withstand voltage can be improvedby providing the buffer layer and the compound semiconductor withgreater thickness while suppressing the warp of the substrate.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic cross-sectional view illustrating a configurationof a main section of a semiconductor device according to Embodiment 1 ofthe present invention.

FIG. 2A is a schematic cross-sectional view illustrating a firstmultilayered buffer region of a buffer layer of the semiconductor devicein FIG. 1 with a part thereof enlarged.

FIG. 2B is a schematic cross-sectional view illustrating a secondmultilayered buffer region of the buffer layer of the semiconductordevice in FIG. 1 with a part thereof enlarged.

FIG. 3 is a schematic cross-sectional view illustrating a configurationof a main section of a semiconductor device according to Modification 1of Embodiment 1.

FIG. 4A is a schematic cross-sectional view illustrating a firstmultilayered buffer region of a buffer layer of a semiconductor deviceaccording to Modification 2 of Embodiment 1 with a part thereofenlarged.

FIG. 4B is a schematic cross-sectional view illustrating a secondmultilayered buffer region of the buffer layer of the semiconductordevice according to Modification 2 of Embodiment 1 a part thereofenlarged.

FIG. 5 is a schematic cross-sectional view illustrating a configurationof a main section of a semiconductor device according to Modification 3of Embodiment 1.

FIG. 6 is a schematic cross-sectional view illustrating a configurationof a main section of a semiconductor device according to Embodiment 2 ofthe present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Embodiments of the present invention are described with reference to thedrawings. In the following drawings, the same or similar components aredenoted by the same or similar symbols. However, the drawings are onlyschematic and are different from the actual one. Further, the drawingsmay include parts where dimensional relations and proportion between thedrawings are different from each other.

The following embodiments only exemplify devices and methods to specifytechnical ideas of the present invention and the technical ideas of thepresent invention do not limit the arrangements and so on of respectivecomponents as described below.

The technical ideas of the present invention can be changed in variousways within a scope of claims.

Embodiment 1

Embodiment 1 describes an example of applying the present invention in asemiconductor device provided with a high electron mobility transistor(HEMT).

[Configuration of HEMT in the Semiconductor Device]

As illustrated in FIG. 1, a semiconductor device 1 according toEmbodiment 1 includes a substrate 2, a buffer layer 3 provided on thesubstrate 2, and a nitride compound semiconductor layer (mainsemiconductor region) 4 provided on the buffer layer 3 and used as adevice region. A HEMT 10 is provided in the nitride compoundsemiconductor layer 4.

In Embodiment 1, a silicon (Si) single-crystal semiconductor substrateis used as the substrate 2. The silicon single-crystal semiconductorsubstrate is more inexpensive than a sapphire substrate and the like forexample. Silicon has a lattice constant of 0.543 nm and a thermalexpansion coefficient of 2.6×10⁻⁶ K⁻¹ (2.55×10⁻⁶ to 4.33×10⁻⁶K⁻¹).

The substrate 2 is not limited to the above example, and a siliconcompound substrate such as a silicon carbide (SiC) substrate or anitride compound semiconductor substrate such as a gallium nitride (GaN)substrate can be used.

The buffer layer 3 has a function to relax lattice mismatch between thesubstrate 2 and the nitride compound semiconductor layer 4. The bufferlayer 3 includes a nitride compound semiconductor sublayer 31, a firstmultilayered buffer region 32, and a second multilayered buffer region33. The nitride compound semiconductor sublayer 31 has aluminum (Al)composition provided on the substrate 2. The first multilayered bufferregion 32 is provided on the nitride compound semiconductor sublayer 31and formed by alternately laminating a plurality of first buffers 321and second buffers 322. The second multilayered buffer region 33 isprovided on the first multilayered buffer region 32 and formed byalternately laminating a plurality of first buffers 331 and secondbuffers 332.

For the nitride compound semiconductor sublayer 31 of the buffer layer3, an AlN layer expressed by Equation (1) is used:

Al_(x)In_(y)Ga_((1−x−y))N   (1)

here, x>0, y>=0, and x+y<=1. The lattice constant of AlN is 0.3112 nm,and the thermal expansion coefficient is 4.15×10⁻⁶ K⁻¹. The thickness ofthe nitride compound semiconductor sublayer 31 of the buffer layer 3 isset for example to 50 to 200 nm. Each of the layers in the buffer layer3 is grown by an epitaxial growth method using Metal-Organic Vapor PhaseEpitaxy (MOVPE) apparatus.

As illustrated in FIGS. 1 and 2A, in the first multilayered bufferregion 32, each of the first buffers 321 is a superlattice buffer regionof which a first nitride compound semiconductor layer and a secondnitride compound semiconductor layer are alternately laminated. Here,the first nitride compound semiconductor layer has an Al composition andthe second nitride compound semiconductor layer has a larger latticeconstant than that of the first nitride compound semiconductor layer.For the first nitride compound semiconductor layer, the AlN layerexpressed by Equation (1) is used. The thickness of each of the firstnitride compound semiconductor layers of the first buffers 321 is setfor example to 4 to 6 nm. For each of the second nitride compoundsemiconductor layers, a GaN layer expressed by Equation (2) is used:

Al_(m)In_(n)Ga_((1−a−b))N   (2)

here, x>a>=0, b>=0, and a+b<=1. The lattice constant of GaN is 0.3189nm, and the thermal expansion coefficient is 5.59×10⁻⁶ K⁻¹. Thethickness of each of the second nitride compound semiconductor layers ofthe first buffers 321 is set for example to 2 to 4 nm.

Each of the first buffers 321 is formed by alternately laminating thefirst nitride compound semiconductor layer and the second nitridecompound semiconductor layer. In Embodiment 1, the number of laminatesis set to 5 to 15 for the first nitride compound semiconductor layer andthe second nitride compound semiconductor layer, respectively, and thethickness of each of the first buffers 321 in the first multilayeredbuffer region 32 is set to 50 to 150 nm.

Each of the second buffers 322 is a single-layered buffer having a thirdnitride compound semiconductor layer of which the lattice constant islarger than that of each of the first buffers 321. For the third nitridecompound semiconductor layer, a GaN layer expressed by Equation (3) isused:

Al_(m)In_(n)Ga_((1−m−n))N   (3)

here, a>=m>=0, n>=0, and m+n<=1. Each of the second buffers 322 isbasically set to be thicker than each of the first buffers 321, which is150 to 250 nm for example, and preferably 190 to 210 nm.

In the first multilayered buffer region 32, the first buffers 321 andthe second buffers 322 are alternately laminated. In Example 1, thenumber of laminates is set to 5 for the first buffers 321 and the secondbuffers 322, respectively.

As illustrated in FIGS. 1 and 2B, similarly to the first buffers 321 ofthe first multilayered buffer region 32, each of the first buffers 331of the second multilayered buffer region 33 is a superlattice bufferregion of which a first nitride compound semiconductor layer and asecond nitride compound semiconductor layer are alternately laminated.Here, the first nitride compound semiconductor layer has an Alcomposition and the second nitride compound semiconductor layer has alarger lattice constant than that of the first nitride compoundsemiconductor layer. For the first nitride compound semiconductor layerof the first buffers 331, an AlN layer expressed by Equation (1) isused. The thickness of each of the first nitride compound semiconductorlayers of the first buffers 331 is set for example to 4 to 6 nm. Foreach of the second nitride compound semiconductor layers of the firstbuffers 331, a GaN layer expressed by Equation (2) is used. Thethickness of each of the second nitride compound semiconductor layers ofthe first buffers 331 is set for example to 2 to 4 nm. In Embodiment 1,the number of laminates is set to 10 for the first nitride compoundsemiconductor layer and the second nitride compound semiconductor layer,respectively, in each of the first buffers 331, and the thickness ofeach of the first buffers 331 is set to 50 to 150 nm.

Each of the second buffers 332 of the second multilayered buffer region33 is a single-layered buffer having a third nitride compoundsemiconductor layer of which the lattice constant is larger than that ofthe first buffers 331 of the second multilayered buffer region 33. Forthe third nitride compound semiconductor layer, a GaN layer expressed byEquation (3) is used. Each of the second buffers 332 of the secondmultilayered buffer region 33 is set for example to 150 to 200 nmthickness which is thicker than each of the first buffers 331 of thesecond multilayered buffer region 33 and also set to 160 to 180 nmthickness which is thinner than each of the second buffers 322 of thefirst multilayered buffer region 32.

In the second multilayered buffer region 33, the first buffers 331 andthe second buffers 332 are alternately laminated. In Embodiment 1, thenumber of laminates is set to 5 for the first buffers 331 and the secondbuffers 332, respectively.

In the buffer layer 3, each of the second buffers 332 of the secondmultilayered buffer region 33 illustrated in FIG. 2B is set to bethinner than each of the second buffers 322 of the first multilayeredbuffer region 32 illustrated in FIG. 2A. That means, a pair of the firstbuffer 331 and the neighboring second buffer 332 of the secondmultilayered buffer region 33 has higher total Al composition than thatof a pair of the first buffer 321 and the neighboring second buffer 322of the first multilayered buffer region 32. In Embodiment 1, the pair ofthe first buffer 321 and the neighboring second buffer 322 of the firstmultilayered buffer region 32 (the first multilayered buffer region 32),which is on the substrate 2 side, has the total Al composition of 21 to22%. On the other hand, the pair of the first buffer 331 and theneighboring second buffer 332 of the second multilayered buffer region33 (the second multilayered buffer region 33), which is on the nitridecompound semiconductor layer 4 side, has the total Al composition of 24to 26%.

Each of the second buffer 322 of the first multilayered buffer regions32 and the second buffer 332 of the second multilayered buffer region 33is GaN layer in which shrinkage after growing in a fabrication processis greater than silicon of the substrate 2 and each of the first buffers321 and 331. Thus, by setting the total Al composition of the pair ofthe first buffer 331 and the neighboring second buffer 332 of the secondmultilayered buffer region 33 high in the buffer layer 3 on the nitridecompound semiconductor layer 4 side, compressive stress generated in thesecond buffers 332 of the second multilayered buffer region 33 becomessmall and tensile stress generated in the first buffers 331 of thesecond multilayered buffer region 33 becomes small as well.

In order to grow the thicker nitride compound semiconductor layer 4 onthe buffer layer 3 while suppressing cracks thereon, average Alcomposition is made higher for the effective growth considering stressbalance between the respective layers. The tensile stress is generatedin the nitride compound semiconductor in the cooling process afterfinishing the deposition based on a difference between the thermalexpansion coefficient of the silicon (substrate 2) and the nitridecompound semiconductor (buffer layer 3). When the tensile stress reachesyield condition, cracks occur on the nitride compound semiconductor.Here, if the average Al composition of the buffer layer 3 is set higherthan that of the nitride compound semiconductor layer 4, the tensilestress is applied to the buffer layer 3 and the compressive stress isapplied to the nitride compound semiconductor layer 4 due to therelation between the lattice constants of both layers. Adjustment of thestress balance thus secured reduces the tensile stress in the nitridecompound semiconductor layer 4 and can suppress the cracks fromoccurring. On the other hand, the tensile stress in the buffer layer 3increases. However, each of the first buffer 321 of the firstmultilayered buffer regions 32 and the first buffer 331 of the secondmultilayered buffer regions 33 has the multilayered structure of AlNlayers and GaN layers (superlattice buffer region), which can reduce thestress therein and suppress the cracks from occurring. The stressrelaxation by adopting the multilayered structure is achieved byintroducing dislocation and by crystal defects occurring at aheterojunction interface. That is, as the average Al composition of thebuffer layer 3 becomes higher, the tensile stress generated in thenitride compound semiconductor layer 4 can be reduced more. For thisreason, the buffer layer 3 and the nitride compound semiconductor layer4 can be respectively grown thick, while suppressing cracks fromoccurring in the nitride compound semiconductor layer 4.

In the buffer layer 3, the tensile stress occurs in each of the firstbuffers 321 of the first multilayered buffer region 32 due to thelattice constant difference with each of the second buffers 322, andsimilarly, the tensile stress occurs in each of the first buffers 331 ofthe second multilayered buffer region 33 due to the lattice constantdifference with each of the second buffers 332. Elastic deformationoccurs and warp is inherent in all the layers.

On the nitride compound semiconductor layer 4 side of the buffer layer3, the second multilayered buffer region 33 is arranged. The thinnereach of the second buffers 332 of the second multilayered buffer region33 becomes, the smaller the tensile stress of each of the neighboringfirst buffer 331 becomes.

In the second multilayered buffer region 33, thinning of each of thesecond buffers 332 indicates that the total Al composition becomeshigher for the pair of the first buffer 331 and the neighboring secondbuffer 332. Arranging the second multilayered buffer region 33 on thenitride compound semiconductor layer 4 side in the buffer layer 3 cansuppress the cracks from occurring in the nitride compound semiconductorlayer 4.

On the substrate 2 side in the buffer layer 3, the first multilayeredbuffer region 32 is arranged. By thickening each of the second buffers322 of the first multilayered buffer region 32, the tensile stressapplied to each of the neighboring buffers 321 becomes larger. Manycrystal defects occur on the substrate side, increasing the stressrelaxation effect.

Thickening of each of the second buffers 322 indicates that the total Alcomposition becomes lower for the pair of the first buffer 321 and theneighboring second buffer 322.

In the semiconductor device 1 according to Embodiment 1, the bufferlayer 3 includes: the first multilayered buffer region 32 in which thetotal Al composition of each pair of the first buffer 321 and the secondbuffer 322 is uniform; and the second multilayered buffer region 33 inwhich the total Al composition of each pair of the first buffer 331 andthe second buffer 332 is uniform. The Al composition is set to change ina step-by-step manner, so that the Al composition becomes larger bystages from the substrate 2 side to the nitride compound semiconductorlayer 4 side. Here, the Al composition is changed step-by-step linearly.In other words, in the buffer layer 3, each of the second buffers 332 ofthe second multilayered buffer region 33 are changed to become thinnerby stages with respect to each of the second buffers 322 of the firstmultilayered buffer region 32. As described in later embodiments, thechange here is a two-step change, although the change is not limited tothis number.

In Embodiment 1, the Al composition of each pair of the first buffer 321and the second buffer 322 of the first multilayered buffer region 32(the first multilayered buffer region 32) is uniform, and so is the Alcomposition of each pair of the first buffer 331 and the second buffer332 of the second multilayered buffer region 33 on the firstmultilayered buffer region 32 (the second multilayered buffer region33), and the Al composition is changed step-by-step linearly. However,the change is not limited to the above, and at least in the secondmultilayered buffer region 33, the Al composition can be made graduallysmall for every pair of the first buffer 331 and the second buffer 332as the pairs get closer to the nitride compound semiconductor layer 4,thus the change is made in a curved manner. The curved change of the Alcomposition of the second multilayered buffer region 33 indicates thatthe thickness of each of the second buffers 332 of the secondmultilayered buffer region 33 changes in the curved manner.

As illustrated in FIG. 1, the nitride compound semiconductor layer 4(compound semiconductor layer) includes a first semiconductor layer 41arranged on the buffer layer 3, and a second semiconductor layer 42arranged on the first semiconductor layer 41. The first semiconductorlayer 41 is composed of a nitride compound semiconductor layer, or morespecifically, an undoped GaN layer expressed by Equation (4):

Al_(x)In_(y)Ga_((1−x−y))N   (4)

here, 0<=x<=1, 0<=y<=1, and 0<=x+y<=1. The thickness of the firstsemiconductor layer 41 is set to 3 μm, for example.

The first semiconductor layer 41 functions as a carrier transit layer.In Embodiment 1, electrons function as carriers in the HEMT 10, hencethe first semiconductor layer 41 functions as an electron transit layer.The second semiconductor layer 42 is composed of the nitride compoundsemiconductor layer, specifically an undoped AlGaN layer which isexpressed by Equation (4) and having a smaller lattice constant and alarger band gap than those of the first semiconductor layer 41. Thesecond semiconductor layer 42 functions as a carrier supply layer, andas an electron supply layer in Embodiment 1.

Regarding the nitride compound semiconductor layer 4, in the vicinity ofa heterojunction interface of the first semiconductor layer 41 and thesecond semiconductor layer 42 and on the first semiconductor layer 41, atwo-dimensional carrier gas layer, specifically a two-dimensionalelectron gas (2DEG) layer is formed. The two-dimensional carrier gaslayer 43 functions as a channel region through which a current (oreither electrons or protons) flows in the HEMT 10.

As illustrated in FIG. 1, the HEMT 10 is provided on the nitridecompound semiconductor layer 4, and includes the 2-dimensional carriergas layer 43, a first main electrode (for example, a source electrode)5A, a second main electrode (for example, a drain electrode) 5B, and agate electrode 6.

In Embodiment 1, the first and second main electrodes 5A and 5B arerespectively arranged on the second semiconductor layer 42. For thefirst and second main electrodes 5A and 5B, a laminate film can be usedin which an aluminum (Al) layer is laminated on the titanium (Ti) layer.

The gate electrode 6 is arranged on the second semiconductor layer 42with a Schottky contact, and positioned between the first main electrode5A and second main electrode 5B. For the gate electrode 6, a nickel (Ni)layer can be used for example.

Characteristics of Embodiment 1

As described above, in the semiconductor device 1 according toEmbodiment 1, the Al composition of the second multilayered bufferregion 33 on the nitride compound semiconductor layer 4 side is sethigher than that of the first multilayered buffer region 32 on thesubstrate 2 side. In other words, the buffers 332 of the secondmultilayered buffer region 33 on the nitride compound semiconductorlayer 4 side are set thinner than the buffers 322 of the firstmultilayered buffer region 32 on the substrate 2 side.

By having the above configured buffer layer 3, the tensile stressapplied to the buffer layer 3 on the substrate 2 side can be increasedto suppress the warp of the substrate 2, and the tensile stress appliedto the buffer layer 3 on the nitride compound semiconductor layer 4 sidecan be reduced to suppress the cracks from occurring on the nitridecompound semiconductor layer 4. Accordingly, the buffer layer 3 and thenitride compound semiconductor layer 4 can respectively be made thickwhile suppressing the warp of the substrate 2 (a semiconductor wafer ina fabricating process), thereby improving the withstand voltage of thedevice.

[Modification 1]

Modification 1 of Embodiment 1 describes a semiconductor device 1A whichis a modification of the buffer layer 3 of the semiconductor device 1according to Embodiment 1.

As illustrated in FIG. 3, in the semiconductor device 1A according toModification 1 of Embodiment 1, the buffer layer 3 includes three ormore multilayered buffer regions 32 to 3 n, from the substrate 2 towardsthe nitride compound semiconductor layer 4. The first multilayeredbuffer region 32 is formed by laminating the first buffer 321 and thesecond buffer 322, where the first buffer 321 is formed by alternatelylaminating the first nitride compound semiconductor (AlN) layers and thesecond nitride compound semiconductor (GaN) layers, and the secondbuffer 322 is composed by third nitride compound semiconductor (GaN)layer. Similarly, the second multilayered buffer region 33 is formed bylaminating the first buffer 331 and the second buffer 332, where thefirst buffer 331 is formed by alternately laminating the first nitridecompound semiconductor (AlN) layers and the second nitride compoundsemiconductor (GaN) layers, and the second buffer 332 is composed by thethird nitride compound semiconductor (GaN) layer. Likewise, the (n−1)-thmultilayered buffer region 3 n is formed by laminating the first buffer3 n 1 and the second buffer 3 n 2, where the first buffers 3 n 1 isformed by alternately laminating the first nitride compoundsemiconductor (AlN) layers and the second nitride compound semiconductor(GaN) layers, and the second buffer 3 n 2 is composed by the thirdnitride compound semiconductor (GaN) layer.

For example, referring to the above described semiconductor device 1according to Embodiment 1, the thickness of the second buffer 322 of thefirst multilayered buffer region 32 is set to 200 nm. Then, the bufferthickness of each of the second buffers 332 to 3 n 2 is reducedstep-by-step by 10 nm. That is, if ten layers of the multilayered bufferregions are provided, the second buffer 332 of the second multilayeredbuffer region 33 becomes 190 nm thickness, the second buffer 342 of thethird multilayered buffer region 34 becomes 180 nm thickness, . . . andthe second buffer 3 n 2 of the (n−1)-th (n−1=10) multilayered bufferregion 3 n becomes 110 nm thick. Similarly to the semiconductor device 1according to Embodiment 1, in the semiconductor device 1A according toModification 1 of Embodiment 1, the total Al composition becomes low forthe pair of the first buffer 321 and the second buffer 322 of the firstmultilayered buffer region 32 of the buffer layer 3 on the substrate 2side, and the total Al composition becomes high for the pair of thefirst buffer 3 n 1 and the second buffers 3 n 2 of the (n−1)-thmultilayered buffer region 3 n on the nitride compound semiconductorlayer 4 side. Moreover, in the buffer layer 3, the second buffer 3 n 2of the (n−1)-th multilayered buffer region 3 n on the nitride compoundsemiconductor layer 4 side is thinner than the second buffer 321 of thefirst multilayered buffer region 32 on the substrate 2 side.

In the buffer layer 3, the Al composition increases gradually andlinearly in step-by-step manner from the substrate 2 side towards thenitride compound semiconductor layer 4 side, and the thickness reducesgradually and linearly in step-by-step manner from the second buffer 322to the second buffer 3 n 2.

Regarding the semiconductor device 1A according to Modification 1 ofEmbodiment 1, the Al composition and the thickness of the second buffers322 to 3 n 2 may be changed for every multilayered buffer regions. Forexample, the Al composition is made equal for the first and secondmultilayered buffer regions 32 and 33, and equal for the fourth andfifth multilayered buffer regions 34 and 35, respectively, and thelatter pair may have higher Al composition than the former pair.Likewise, the thickness of the second buffers 322 to 3 n 2 may bechanged gradually.

By having the above configured semiconductor device 1A according toModification 1 of Embodiment 1, the similar functional advantage can beobtained as in the semiconductor device 1 according to Modification 1 ofEmbodiment 1.

[Modification 2]

Modification 2 of Embodiment 1 describes a modification of the bufferlayer 3 of the semiconductor device 1 according to Embodiment 1.

In Modification 2 of Embodiment 1, each of the first buffers 331 of thesecond multilayered buffer region 33 illustrated in FIG. 4B is set to bethinner than each of the first buffers 321 of the first multilayeredbuffer region 32 illustrated in FIG. 4A. That is, the thickness of eachof the first buffers 321 of the first multilayered buffer region 32 donot necessarily be equal to the thickness of each of the first buffers331 of the second multilayered buffer region 33. Here, each of thesecond buffers 332 of the second multilayered buffer region 33 is madethinner than each of the second buffers 322 of the first multilayeredbuffer region 32, so in the same manner, each of the first buffers 331of the second multilayered buffer region 33 is made thinner than each ofthe first buffers 321 of the first multilayered buffer region 32. Thefirst buffers 331 of the second multilayered buffer region 33 are madethin by reducing the number of laminates of the first nitride compoundsemiconductor (AlN) layers and the second nitride compound semiconductor(GaN) layers.

For example in the semiconductor device 1 according to Embodiment 1, thenumber of laminates is set to 10 for the respective first and secondnitride compound semiconductor layers of each of the first buffers 331of the second multilayered buffer region 33. The number is set to 9 inModification 2 of Embodiment 1 for the respective first and secondnitride compound semiconductor layers of each of the first buffers 331of the second multilayered buffer region 33. In this case, in the bufferlayer 3, the Al composition on the substrate 2 side is 21 to 22%,whereas the Al composition on the nitride compound semiconductor layer 4side is 22.5 to 23.5%.

By having the above configuration, the similar functional advantage canbe obtained in Modification 2 of Embodiment 1 as in Embodiment 1.Further, the configuration of Modification 2 of Embodiment 1 may becombined with Modification 1 of Embodiment 1.

[Modification 3]

Modification 3 of Embodiment 1 describes a semiconductor device 1C whichis an example of a semiconductor device according to any one ofEmbodiment 1 and Modifications 1 and 2 of Embodiment 1, where the warpof the substrate 2 can be further suppressed.

As illustrated in FIG. 5, the semiconductor device 1C according toModification 3 of Embodiment 1 further includes a warp regulation layer30 for regulating the warp of the substrate 2, between the substrate 2and the buffer layer 3. The warp regulation layer 30 is formed of anAlGaN layer or a composite film of an AlN layer and a GaN layer, forexample, to act as a foundation of an epitaxial growth film of thebuffer layer 3. The warp regulation layer 30 aims to regulate the warpof the substrate 2, and therefore the Al composition therein is notcounted in the comparison of the Al composition of the buffer layer 3.

By having the above configured semiconductor device 1C according toModification 3 of Embodiment 1, the similar functional advantage can beobtained as in any one of Embodiment 1 and Modifications 1 and 2 ofEmbodiment 1, and moreover, the warp can be further suppressed fromoccurring in the substrate 2 (semiconductor wafer).

Embodiment 2

Embodiment 2 of the present invention describes an example of applyingthe present invention in a semiconductor device provided with a lightemitting diode (LED).

[Configuration of LED in the Semiconductor Device]

As illustrated in FIG. 6, a semiconductor device 1D according toEmbodiment 2 includes the substrate 2, the buffer layer 3 provided onthe substrate 2, and the nitride compound semiconductor layer (mainsemiconductor region) 4 provided on the buffer layer 3 and used as adevice region. An LED 11 is provided on the nitride compoundsemiconductor layer 4. The LED 11 is used as a semiconductor lightemitting device.

The respective configurations of the substrate 2 and the buffer layer 3of the semiconductor device 1D according to Embodiment 2 is basicallythe same with the configurations of the substrate 2 and the buffer layer3 of the semiconductor device 1 according to Embodiment 1.

The nitride compound semiconductor layer 4 includes an n-type claddinglayer 45, an active layer 46, and a p-type cladding layer 47,sequentially arranged on the buffer layer 3 in this order. For then-type cladding layer 45, a silicon-doped GaN layer is used for example.Thickness of the n-type cladding layer 45 is set to 1.8 to 2.2 μm. Forthe p-type cladding layer 47, a laminate of a magnesium-doped AlGaNlayer and a magnesium-doped GaN layer is used for example. The LED 11 isconfigured by including the n-type cladding layer 45, the active layer46, and the p-type cladding layer 47 of the nitride compoundsemiconductor layer 4.

An anode electrode (p-type electrode) 7 is arranged on the p-typecladding layer 47 of the nitride compound semiconductor layer 4, and acathode electrode (n-type electrode) 8 is arranged on a rear surface ofthe substrate 2. Here, the cathode electrode 8 may be arranged on thesurface of the n-type cladding layer 45 after boring a hole from thesurface of the substrate 2 down to the n-type cladding layer 45.

Characteristics of Embodiment 2

As described above, in the semiconductor device 1D according toEmbodiment 2, the similar functional advantage can be obtained as in thesemiconductor device 1 according to Embodiment 1.

Moreover, in the semiconductor device 1D according to Embodiment 2, therespective buffer layers 3 according to Modifications 1 and 2 ofEmbodiment 1 can be used, and the warp regulation layer 30 according toModification 3 of Embodiment 1 can be used as well.

Other Embodiments

As described above, the description is described using some embodiments,however, the discussion and the drawings constituting a part of thedisclosure do not limit the present invention. The present invention canbe applied to various alternative embodiments, examples and operationtechniques.

For example, the buffer layer 3, which is used in the above describedsemiconductor device according to Embodiments 1 and 2, can also be usedwhen configuring a Schottky barrier diode (SBD) on the nitride compoundsemiconductor layer 4. Further, in the semiconductor device according toEmbodiments 1 and 2, an example of using the nitride compoundsemiconductor layer 4 with the thickness of 1 μm or more is described;however, the above described buffer layer 3 can be used with the nitridecompound semiconductor layer 4 with the thickness of 1 μm or less.

1. A semiconductor device comprising: a substrate; a buffer layerarranged on the substrate; and a compound semiconductor layer arrangedon the buffer layer and functions as a device region, wherein the bufferlayer is configured by laminating two or more pairs of a first bufferand a second buffer, the first buffer is formed by laminating one ormore pairs of a first nitride compound semiconductor layer and a secondnitride compound semiconductor layer, the first nitride compoundsemiconductor layer having an aluminum composition therein, the secondnitride compound semiconductor layer having a larger lattice constantthan that of the first nitride compound semiconductor layer, the secondbuffer includes a third nitride compound semiconductor layer having alarger lattice constant than that of the first buffer, and a total Alcomposition of a pair of the first buffer and the second buffer on thecompound semiconductor layer side is higher than that of a pair of thefirst buffer and the second buffer on the substrate side.
 2. Thesemiconductor device according to claim 1, wherein a thickness of thesecond buffer on the compound semiconductor layer side is set to bethinner than that of the second buffer on the substrate side.
 3. Thesemiconductor device according to claim 2, wherein a thickness of eachsecond buffer is set to become gradually thinner from the substrate sidetowards the compound semiconductor layer side.
 4. The semiconductordevice according to claim 1, wherein in each of the pairs of the firstbuffer and the second buffer, the second buffer is set to be thickerthan the first buffer.
 5. The semiconductor device according to claim 1,wherein each first buffer is set to 50 to 150 nm thickness, and eachsecond buffer is set to 100 to 400 nm thickness.
 6. The semiconductordevice according to claim 1, wherein a total Al composition of each pairof the first buffer and the second buffer is set to become graduallyhigher from the substrate side towards the compound semiconductor layerside.
 7. The semiconductor device according to claim 1, wherein for thesubstrate, any one of a silicon substrate, a silicon compound substrate,and a nitride compound semiconductor substrate is used.